ghidra/Ghidra/Processors/6805/data/languages/6805.pspec

39 lines
1.4 KiB
XML

<?xml version="1.0" encoding="UTF-8"?>
<processor_spec>
<programcounter register="PC"/>
<default_symbols>
<symbol name="PORTA" address="0"/>
<symbol name="PORTB" address="1"/>
<symbol name="PORTC" address="2"/>
<symbol name="PORTD" address="3"/>
<symbol name="DDRA" address="4"/>
<symbol name="DDRB" address="5"/>
<symbol name="DDRC" address="6"/>
<symbol name="DDRD" address="7"/>
<symbol name="SPCR" address="A"/>
<symbol name="SPSR" address="B"/>
<symbol name="SPDR" address="C"/>
<symbol name="BAUD" address="D"/>
<symbol name="SCCR1" address="E"/>
<symbol name="SCCR2" address="F"/>
<symbol name="SCSR" address="10"/>
<symbol name="SCDAT" address="11"/>
<symbol name="TCR" address="12"/>
<symbol name="TSR" address="13"/>
<symbol name="ICHR" address="14"/>
<symbol name="ICLR" address="15"/>
<symbol name="OCHR" address="16"/>
<symbol name="OCLR" address="17"/>
<symbol name="CHR" address="18"/>
<symbol name="CLR" address="19"/>
<symbol name="ACHR" address="1A"/>
<symbol name="ACLR" address="1B"/>
</default_symbols>
<default_memory_blocks>
<memory_block name="IO" start_address="0" length="0x20" initialized="false"/>
<memory_block name="LOW_RAM" start_address="0x50" length="0x70" initialized="false"/>
<memory_block name="STACK" start_address="0xC0" length="0x40" initialized="false"/>
</default_memory_blocks>
</processor_spec>