197 lines
6.0 KiB
XML
197 lines
6.0 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<compiler_spec>
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<!-- Copied from AARCH.cspec and modified...
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See: https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2019
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The AARCH64 ABI refers to Windows ABI as LLP64 data model -->
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<data_organization>
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<absolute_max_alignment value="0" />
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<machine_alignment value="4" />
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<default_alignment value="1" />
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<default_pointer_alignment value="8" />
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<pointer_size value="8" />
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<wchar_size value="2" />
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<short_size value="2" />
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<integer_size value="4" />
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<long_size value="4" />
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<long_long_size value="8" />
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<float_size value="4" />
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<double_size value="8" />
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<long_double_size value="16" />
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<size_alignment_map>
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<entry size="1" alignment="1" />
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<entry size="2" alignment="2" />
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<entry size="4" alignment="4" />
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<entry size="8" alignment="8" />
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<entry size="16" alignment="16" />
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</size_alignment_map>
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<bitfield_packing>
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<use_MS_convention value="true"/>
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</bitfield_packing>
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</data_organization>
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<global>
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<range space="ram"/>
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</global>
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<stackpointer register="sp" space="ram"/>
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<funcptr align="4"/> <!-- Function pointers are word aligned and leastsig bit may encode otherstuff -->
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<prefersplit style="inhalf">
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<register name="q0"/>
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<register name="q1"/>
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<register name="q2"/>
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<register name="q3"/>
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<register name="q4"/>
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<register name="q5"/>
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<register name="q6"/>
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<register name="q7"/>
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<register name="q8"/>
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<register name="q9"/>
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<register name="q10"/>
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<register name="q11"/>
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<register name="q12"/>
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<register name="q13"/>
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<register name="q14"/>
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<register name="q15"/>
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<register name="q16"/>
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<register name="q17"/>
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<register name="q18"/>
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<register name="q19"/>
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<register name="q20"/>
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<register name="q21"/>
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<register name="q22"/>
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<register name="q23"/>
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<register name="q24"/>
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<register name="q25"/>
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<register name="q26"/>
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<register name="q27"/>
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<register name="q28"/>
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<register name="q29"/>
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<register name="q30"/>
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</prefersplit>
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<default_proto>
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<prototype name="__cdecl" extrapop="0" stackshift="0">
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<input>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d0"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d1"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d2"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d3"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d4"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d5"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d6"/>
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</pentry>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d7"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x0"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x1"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x2"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x3"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x4"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x5"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x6"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x7"/>
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</pentry>
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<pentry minsize="1" maxsize="500" align="4">
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<addr offset="0" space="stack"/>
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</pentry>
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</input>
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<output>
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<pentry minsize="1" maxsize="8" metatype="float">
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<register name="d0"/>
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</pentry>
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<pentry minsize="1" maxsize="8" extension="zero">
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<register name="x0"/>
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</pentry>
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</output>
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<unaffected>
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<register name="x19"/>
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<register name="x20"/>
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<register name="x21"/>
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<register name="x22"/>
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<register name="x23"/>
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<register name="x24"/>
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<register name="x25"/>
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<register name="x26"/>
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<register name="x27"/>
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<register name="x28"/>
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<register name="x29"/>
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<register name="x30"/>
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<register name="sp"/>
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<!-- vectors -->
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<register name="d8"/>
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<register name="d9"/>
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<register name="d10"/>
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<register name="d11"/>
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<register name="d12"/>
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<register name="d13"/>
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<register name="d14"/>
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<register name="d15"/>
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</unaffected>
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<killedbycall>
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<!-- x8: indirect result location register, which is not
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reflected in the pentry list -->
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<register name="x8"/>
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<register name="x9"/>
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<register name="x10"/>
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<register name="x11"/>
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<register name="x12"/>
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<register name="x13"/>
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<register name="x14"/>
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<register name="x15"/>
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<register name="x16"/>
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<register name="x17"/>
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<register name="x18"/>
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<!-- vectors -->
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<register name="d16"/>
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<register name="d17"/>
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<register name="d18"/>
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<register name="d19"/>
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<register name="d20"/>
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<register name="d21"/>
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<register name="d22"/>
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<register name="d23"/>
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<register name="d24"/>
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<register name="d25"/>
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<register name="d26"/>
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<register name="d27"/>
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<register name="d28"/>
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<register name="d29"/>
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<register name="d30"/>
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<register name="d31"/>
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</killedbycall>
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</prototype>
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</default_proto>
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</compiler_spec>
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