ghidra/Ghidra/Processors/PA-RISC/data/languages/pa-risc32.cspec

71 lines
1.9 KiB
XML

<?xml version="1.0" encoding="UTF-8"?>
<compiler_spec>
<global>
<range space="ram"/>
<range space="register" first="0x3000" last="0x3fff"/> <!-- Space registers -->
<range space="register" first="0x5000" last="0x5fff"/> <!-- Control registers -->
</global>
<stackpointer register="sp" space="ram" growth="positive" />
<default_proto>
<prototype name="__stdcall" extrapop="0" stackshift="0">
<input>
<pentry minsize="1" maxsize="4">
<register name="r26"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r25"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r24"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="r23"/>
</pentry>
<pentry minsize="1" maxsize="500" align="4">
<addr offset="0xfffffddc" space="stack"/>
</pentry>
</input>
<output>
<pentry minsize="1" maxsize="4">
<register name="r28"/>
</pentry>
</output>
<unaffected>
<register name="r0"/>
<register name="r1"/>
<register name="rp"/>
<register name="r3"/>
<register name="r4"/>
<register name="r5"/>
<register name="r6"/>
<register name="r7"/>
<register name="r8"/>
<register name="r9"/>
<register name="r10"/>
<register name="r11"/>
<register name="r12"/>
<register name="r13"/>
<register name="r14"/>
<register name="r15"/>
<register name="r16"/>
<register name="r17"/>
<register name="r18"/>
<register name="r19"/>
<register name="r20"/>
<register name="r21"/>
<register name="r22"/>
<register name="dp"/>
<register name="sp"/>
<register name="r31"/>
</unaffected>
</prototype>
</default_proto>
</compiler_spec>