64 lines
1.9 KiB
Plaintext
64 lines
1.9 KiB
Plaintext
#
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# PIC-12 Main Section
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# includes constants, memory space and common register space definitions
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#
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# STATUS bit definitions
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@define STATUS_PA0_BIT 5
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@define STATUS_Z_BIT 2
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@define STATUS_DC_BIT 1
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@define STATUS_C_BIT 0
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# STATUS bit masks used for setting
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@define STATUS_PA_MASK 0x60
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@define STATUS_Z_MASK 0x04
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@define STATUS_DC_MASK 0x02
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@define STATUS_C_MASK 0x01
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# STATUS bit masks used for clearing
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@define STATUS_PA_CLEARMASK 0x9F
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@define STATUS_Z_CLEARMASK 0xFB
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@define STATUS_DC_CLEARMASK 0xFD
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@define STATUS_C_CLEARMASK 0xFE
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@define FSR_BSEL_MASK 0x60 # FSR<5:6> Bank Select bits : Direct Addressing
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define endian=little;
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define alignment=2;
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# Instruction Memory (ROM-based)
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define space CODE type=ram_space wordsize=2 size=2 default;
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# General Purpose Register Memory consists of 2-banks of 32-bytes each
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# Bank selection occurs using FSR bits <6:5>
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define space DATA type=ram_space size=1;
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# HWSTACK consists of a 2-word by 12-bit RAM and a corresponding to a hidden stack pointer (STKPTR).
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define space HWSTACK type=ram_space wordsize=2 size=1; # WORDSIZE is actually 12-bits
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define space register type=register_space size=2;
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# Program Counter (9-bits) - PC Latch: PCL<PC:7-0>
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define register offset=0x0000 size=2 [ PC ];
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# Stack Pointer
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define register offset=0x0002 size=1 [ STKPTR ];
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# Working register
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define register offset=0x0003 size=1 [ W ];
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# PC Latch register (real register is memory based)
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define register offset=0x0004 size=1 [ PCL ];
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# File Selection register (real register is memory based)
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define register offset=0x0005 size=1 [ FSR ];
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# STATUS register (real register is memory based)
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define register offset=0x0006 size=1 [ STATUS ];
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# Status bit registers (these do not really exist and must get reflected into the STATUS byte register)
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define register offset=0x0007 size=1 [ PA Z DC C ];
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# Option Register
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define register offset=0x00b size=1 [ OPTION ];
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