29 lines
661 B
Plaintext
29 lines
661 B
Plaintext
@define PROCESSOR "PIC_12C5XX"
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@include "pic12.sinc"
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#
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# NOTES -
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# 1. If a specific PIC-12 has a different register set, this file and the pic12c5xx.specl file may be copied/renamed and
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# slightly modified to specify a the correct Register File Map.
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#
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# Bank-0 File Registers
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define DATA offset=0x00 size=1 [
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INDF TMR0 PCL.0 STATUS.0 FSR.0 OSCCAL GPIO
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];
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@include "pic12_instructions.sinc"
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# IO Tristate Register
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define register offset=0x0020 size=1 [ TRIS ];
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# TRIS register
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trisREG: "6" is f5=0x6 { export TRIS; }
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:TRIS trisREG is op6=0x00 & d=0 & trisREG {
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# ---- 0000 0000 0fff
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# 0000 0000 0000 0110 -> TRIS 6
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trisREG = W;
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}
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