56 lines
1.8 KiB
Plaintext
56 lines
1.8 KiB
Plaintext
#
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# PIC-17C7xx Main Section
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# includes constants, memory space and common register space definitions
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#
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@define SFR_BASE 0x0F80
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@define BANK15_BASE 0x0F00
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# ALUSTA bit definitions
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@define STATUS_OV_BIT 3
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@define STATUS_Z_BIT 2
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@define STATUS_DC_BIT 1
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@define STATUS_C_BIT 0
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# ALUSTA bit masks used for clearing
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@define STATUS_OV_CLEARMASK 0xF7
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@define STATUS_Z_CLEARMASK 0xFB
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@define STATUS_DC_CLEARMASK 0xFD
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@define STATUS_C_CLEARMASK 0xFE
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define endian=little;
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define alignment=2;
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# Instruction Memory (ROM-based)
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define space CODE type=ram_space wordsize=2 size=2 default;
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# General Purpose Register Memory
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# 0x00 - 0x0f : Unbanked registers
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# 0x10 - 0x17 : Banked registers (9 banks controlled by lower nibble of BSR)
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# 0x18 - 0x19 : Unbanked registers
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# 0x1a - 0x1f : Unbanked GPRs
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# 0x20 - 0xff : Banked GPRs (4 banks controlled by upper nibble of BSR)
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define space DATA type=ram_space size=2;
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# The HWSTACK consists of a 16_word by 16_bit RAM and a corresponding 4_bit STKPTR register (which is not readable or writable).
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# There is no means of directly accessing the stack space other than via a CALL, RETURN, RETLW or RETFIE
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define space HWSTACK type=ram_space size=1; # implemented as independently addressable bytes (each location is 2-bytes wide)
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define space register type=register_space size=2;
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# Program Counter
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define register offset=0x0000 size=2 [ PC ];
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# Stack Pointer (4-bits)
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define register offset=0x0004 size=1 [ STKPTR ];
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# ALUSTA bit registers (these do not really exist and must get reflected into the STATUS byte register)
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define register offset=0x0005 size=1 [ FS32 FS10 OV Z DC C ];
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# Table Latch (not visible)
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define register offset=0x0010 size=1 [ TBLATL TBLATH ];
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define register offset=0x0010 size=2 [ TBLAT ];
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# Mirrored registers for improved decompiler behavior
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define register offset=0x0020 size=1 [ WREG ];
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