79 lines
2.5 KiB
Plaintext
79 lines
2.5 KiB
Plaintext
#
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# PIC-18 Main Section
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# includes constants, memory space and common register space definitions
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#
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@define SFR_BASE 0x0F80
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@define BANK15_BASE 0x0F00
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# STATUS bit definitions
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@define STATUS_N_BIT 4
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@define STATUS_OV_BIT 3
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@define STATUS_Z_BIT 2
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@define STATUS_DC_BIT 1
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@define STATUS_C_BIT 0
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# STATUS bit masks used for clearing
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@define STATUS_N_CLEARMASK 0xEF
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@define STATUS_OV_CLEARMASK 0xF7
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@define STATUS_Z_CLEARMASK 0xFB
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@define STATUS_DC_CLEARMASK 0xFD
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@define STATUS_C_CLEARMASK 0xFE
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@define STATUS_N_Z_MASK 0x14
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# STACK bit defintions
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@define STKPTR_STKFUL_BIT 7
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@define STKPTR_STKUNF_BIT 6
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# STACK bit masks
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@define STKPTR_SP_MASK 0x1F
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@define STKPTR_NOT_SP_MASK 0xE0
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@define STKPTR_STKFUL_MASK 0x80
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@define STKPTR_STKUNF_MASK 0x40
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define endian=little;
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define alignment=2;
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# Instruction Memory (ROM-based)
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define space CODE type=ram_space size=3 default;
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# General Purpose Register Memory consists of 16-banks of 255-bytes each
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define space DATA type=ram_space size=2;
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# The HWSTACK consists of a 31_word by 21_bit RAM and a corresponding 8_bit STKPTR register.
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# The real STKPTR register format is:
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# bit 7: Stack Full Flag (STKFUL) - See Note below
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# bit 6: Stack Underflow Flag (STKUNF) - See Note below
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# bit 5: <unused>
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# bit 4_0: stack pointer location within the 31_word by 21_bit
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# Each stack entry generally contains a 21_bit Program Counter value.
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# The top_of_stack entry (last push) may be accessed via the SFR registers TOSU, TOSH, and TOSL:
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# bit 20_16: TOSU
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# bit 15_8: TOSH
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# bit 7_0: TOSL
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# When accessing these top_of_stack registers, the global interrupts should/must be disabled.
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#
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# NOTE: This PIC-18 pcode implementation does not implement the STKFUL and STKUNF bits.
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# The entire STKPTR register is treated as an address offset into the stack space for simplification.
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# STKPTR value must be multiplied.
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#
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define space HWSTACK type=ram_space size=1; # implemented as independently addressable bytes (each location is 4-bytes wide)
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define space register type=register_space size=2;
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# Program Counter
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define register offset=0x0000 size=3 [ PC ];
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# Bad Register (needed only for attach usage)
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define register offset=0x0003 size=1 [ BAD ];
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# Stack Pointer
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define register offset=0x0004 size=1 [ STKPTR ];
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# Status bit registers (these do not really exist and must get reflected into the STATUS byte register)
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define register offset=0x0005 size=1 [ N OV Z DC C ];
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# Shadow registers (not visible)
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define register offset=0x000a size=1 [ WS STATUSS BSRS ];
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