475 lines
16 KiB
Plaintext
475 lines
16 KiB
Plaintext
#####################################################
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##### Float #####
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#####################################################
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# ABSF.D reg2, reg3 - rrrr011111100000|wwww010001011000
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:absf.d R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b00000; R2731x2 & op2126=0b100010 & op1620=0b11000
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{
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R2731x2 = abs(R1115x2);
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}
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# ABSF.S reg2, reg3 - rrrrr11111100000|wwwww10001001000
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:absf.s R1115, R2731 is R1115 & op0510=0x3F & op0004=0b00000; R2731 & op2126=0b100010 & op1620=0b01000
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{
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R2731 = abs(R1115);
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}
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# ADDF.D reg1, reg2, reg3 - rrrr0111111RRRR0|wwww010001110000
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:addf.d R0004x2, R1115x2, R2731x2 is R1115x2 & op0510=0x3F & R0004x2 ; R2731x2 & op2126=0b100011 & op1620=0b10000
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{
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R2731x2 = R1115x2 f+ R0004x2;
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}
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# ADDF.S reg1, reg2, reg3 - rrrrr111111RRRRR|wwwww10001100000
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:addf.s R0004, R1115, R2731 is R1115 & op0510=0x3F & R0004 ; R2731 & op2126=0b100011 & op1620=0b00000
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{
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R2731 = R1115 f+ R0004;
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}
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# CEILF.DL reg2, reg3 - rrrr011111100010|wwww010001010100
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:ceilf.dl R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b00010; R2731x2 & op2126=0b100010 & op1620=0b10100
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{
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local var:8 = ceil(float2float(R1115x2));
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R2731x2 = trunc(var);
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}
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# CEILF.DUL reg2, reg3 - rrrr011111110010|wwww010001010100
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:ceilf.dul R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b10010; R2731x2 & op2126=0b100010 & op1620=0b10100
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{
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local var:8 = ceil(float2float(R1115x2));
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R2731x2 = trunc(var);
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}
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# CEILF.DUW reg2, reg3 - rrrrr11111110010|wwwww10001010000
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:ceilf.duw R1115x2, R2731 is R1115x2 & op0510=0x3F & op0004=0b10010; R2731 & op2126=0b100010 & op1620=0b10000
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{
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R2731 = trunc(ceil(R1115x2));
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}
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# CEILF.DW reg2, reg3 - rrrrr11111100010|wwwww10001010000
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:ceilf.dw R1115x2, R2731 is R1115x2 & op0510=0x3F & op0004=0b00010; R2731 & op2126=0b100010 & op1620=0b10000
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{
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R2731 = trunc(ceil(R1115x2));
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}
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# CEILF.SL reg2, reg3 - rrrrr11111100010|wwww010001000100
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:ceilf.sl R1115, R2731x2 is R1115 & op0510=0x3F & op0004=0b00010; R2731x2 & op2126=0b100010 & op1620=0b00100
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{
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local var:8 = ceil(float2float(R1115));
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R2731x2 = trunc(var);
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}
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# CEILF.SUL reg2, reg3 - rrrrr11111110010|wwwww10001000100
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:ceilf.sul R1115, R2731x2 is R1115 & op0510=0x3F & op0004=0b10010; R2731x2 & op2126=0b100010 & op1620=0b00100
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{
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local var:8 = ceil(float2float(R1115));
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R2731x2 = trunc(var);
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}
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# CEILF.SUW reg2, reg3 - rrrrr11111110010|wwwww10001000000
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:ceilf.sul R1115, R2731 is R1115 & op0510=0x3F & op0004=0b10010; R2731 & op2126=0b100010 & op1620=0b00000
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{
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R2731 = trunc(ceil(R1115));
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}
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# CEILF.SW reg2, reg3 - rrrrr11111100010|wwwww10001000000
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:ceilf.sw R1115, R2731 is R1115 & op0510=0x3F & op0004=0b00010; R2731 & op2126=0b100010 & op1620=0b00000
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{
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R2731 = trunc(ceil(R1115));
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}
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# CMOVF.D fcbit, reg1, reg2, reg3 - rrrr0111111RRRR0|wwww01000001fff0
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:cmovf.d fcbit1719, R1115x2, R0004x2, R2731x2 is R1115x2 & op0510=0x3F & R0004x2; R2731x2 & op2126=0b100000 & op2020=1 & fcbit1719 & op1616=0
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{
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#CC0 = Bit 24
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local bit = (FPSR >> (fcbit1719 + 24:1)) & 0x1;
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either_or1(R2731x2, bit, R0004x2, R1115x2);
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}
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# CMOVF.S fcbit, reg1, reg2, reg3 - rrrrr111111RRRRR|wwwww1000000fff0
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:cmovf.s fcbit1719, R1115, R0004, R2731 is R1115 & op0510=0x3F & R0004; R2731 & op2126=0b100000 & op2020=0 & fcbit1719 & op1616=0
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{
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local bit = (FPSR >> (fcbit1719 + 24:1)) & 0x1;
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either_or1(R2731, bit, R0004, R1115);
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}
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# CMPF.D fcond, reg2, reg1, fcbit - rrrr0111111RRRRR|0FFFF1000011fff0
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:cmpf.d fcond2730, R1115x2, R0004x2, fcbit1719 is R1115x2 & op0510=0x3F & R0004x2; op3131=0 & fcond2730 & op2126=0b100001 & op2020=1 & fcbit1719 & op1616=0
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{
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#0 = Unordered
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#1 = Equal to
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#2 = Less than
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#3 = Exeption
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#bits = ex le eq un
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local bit:4 = 0;
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compare_float(bit, fcond2730:1, R0004x2, R1115x2);
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local pos:4 = bit << (fcbit1719 + 24); #find position of the calculated bit
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local mask:4 = 1 << (fcbit1719 + 24); #create mask to clean old bit in FPSR register
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FPSR = (FPSR & ~mask) | pos; #set the new bit at the right position
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}
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# CMPF.S fcond, reg2, reg1, fcbit - rrrrr111111RRRRR|0FFFF1000010fff0
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:cmpf.s fcond2730, R1115, R0004, fcbit1719 is R1115 & op0510=0x3F & R0004; op3131=0 & fcond2730 & op2126=0b100001 & op2020=0 & fcbit1719 & op1616=0
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{
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local bit:4 = 0;
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compare_float(bit, fcond2730:1, R0004, R1115);
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local pos:4 = bit << (fcbit1719 + 24); #find position of the calculated bit
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local mask:4 = 1 << (fcbit1719 + 24); #create mask to clean old bit in FPSR register
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FPSR = (FPSR & ~mask) | pos; #set the new bit at the right position
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}
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# CVTF.DL reg2, reg3 - rrrr011111100100|wwww010001010100
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:cvtf.dl R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b00100; R2731x2 & op2126=0b100010 & op1620=0b10100
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{
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R2731x2 = int2float(R1115x2);
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}
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# CVTF.DS reg2, reg3 - rrrr011111100011|wwww010001010010
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:cvtf.ds R1115x2, R2731 is R1115x2 & op0510=0x3F & op0004=0b00011; R2731 & op2126=0b100010 & op1620=0b10010
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{
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R2731 = float2float(R1115x2);
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}
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# CVTF.DUL reg2, reg3 - rrrr011111110100|wwww010001010100
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:cvtf.dul R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b10100; R2731x2 & op2126=0b100010 & op1620=0b10100
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{
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R2731x2 = trunc(R1115x2);
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}
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# CVTF.DUW reg2, reg3 - rrrrr11111110100|wwwww10001010000
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:cvtf.duw R1115x2, R2731 is R1115x2 & op0510=0x3F & op0004=0b10100; R2731 & op2126=0b100010 & op1620=0b10000
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{
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R2731 = trunc(R1115x2);
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}
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# CVTF.DW reg2, reg3 - rrrrr11111100100|wwwww10001010000
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:cvtf.sw R1115x2, R2731 is R1115x2 & op0510=0x3F & op0004=0b00100; R2731 & op2126=0b100010 & op1620=0b10000
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{
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R2731 = trunc(R1115x2);
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}
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# CVTF.LD reg2, reg3 - rrrr011111100001|wwww010001010010
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:cvtf.ls R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b00001; R2731x2 & op2126=0b100010 & op1620=0b10010
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{
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R2731x2 = int2float(R1115x2);
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}
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# CVTF.LS reg2, reg3 - rrrr011111100001|wwwww10001000010
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:cvtf.ls R1115x2, R2731 is R1115x2 & op0510=0x3F & op0004=0b00001; R2731 & op2126=0b100010 & op1620=0b00010
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{
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R2731 = int2float(R1115x2);
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}
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# CVTF.SD reg2, reg3 - rrrrr11111100010|wwww010001010010
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:cvtf.sd R1115, R2731x2 is R1115 & op0510=0x3F & op0004=0b00010; R2731x2 & op2126=0b100010 & op1620=0b10010
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{
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R2731x2 = float2float(R1115);
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}
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# CVTF.SL reg2, reg3 - rrrrr11111100100|wwwww10001000100
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:cvtf.sl R1115, R2731x2 is R1115 & op0510=0x3F & op0004=0b00100; R2731x2 & op2126=0b100010 & op1620=0b00100
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{
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R2731x2 = trunc(R1115);
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}
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# CVTF.SUL reg2, reg3 - rrrrr11111110100|wwwww10001000100
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:cvtf.sul R1115, R2731x2 is R1115 & op0510=0x3F & op0004=0b10100; R2731x2 & op2126=0b100010 & op1620=0b00100
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{
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R2731x2 = trunc(R1115);
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}
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# CVTF.SUW reg2, reg3 - rrrrr11111110100|wwwww10001000000
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:cvtf.suw R1115, R2731 is R1115 & op0510=0x3F & op0004=0b10100; R2731 & op2126=0b100010 & op1620=0b00000
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{
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R2731 = trunc(R1115);
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}
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# CVTF.SW reg2, reg3 - rrrrr11111100100|wwwww10001000000
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:cvtf.sw R1115, R2731 is R1115 & op0510=0x3F & op0004=0b00100; R2731 & op2126=0b100010 & op1620=0b00000
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{
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R2731 = trunc(R1115);
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}
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# CVTF.ULD reg2, reg3 - rrrr011111100001|wwww010001010010
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:cvtf.uls R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b10001; R2731x2 & op2126=0b100010 & op1620=0b10010
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{
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R2731x2 = int2float(R1115x2);
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}
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# CVTF.ULS reg2, reg3 - rrrr011111110001|wwwww10001000010
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:cvtf.uls R1115x2, R2731 is R1115x2 & op0510=0x3F & op0004=0b10001; R2731 & op2126=0b100010 & op1620=0b00010
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{
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R2731 = int2float(R1115x2);
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}
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# CVTF.UWD reg2, reg3 - rrrrr11111110000|wwwww10001010010
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:cvtf.uwd R1115, R2731x2 is R1115 & op0510=0x3F & op0004=0b10000; R2731x2 & op2126=0b100010 & op1620=0b10010
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{
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R2731x2 = int2float(R1115);
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}
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# CVTF.UWS reg2, reg3 - rrrrr11111110000|wwwww10001000010
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:cvtf.uws R1115, R2731 is R1115 & op0510=0x3F & op0004=0b10000; R2731 & op2126=0b100010 & op1620=0b00010
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{
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R2731 = int2float(R1115);
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}
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# CVTF.WD reg2, reg3 - rrrrr11111100000|wwwww10001010010
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:cvtf.wd R1115, R2731x2 is R1115 & op0510=0x3F & op0004=0b00000; R2731x2 & op2126=0b100010 & op1620=0b10010
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{
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R2731x2 = int2float(R1115);
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}
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# CVTF.WS reg2, reg3 - rrrrr11111100000|wwwww10001000010
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:cvtf.ws R1115, R2731 is R1115 & op0510=0x3F & op0004=0b00000; R2731 & op2126=0b100010 & op1620=0b00010
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{
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R2731 = int2float(R1115);
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}
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# DIVF.D reg1, reg2, reg3 - rrrr0111111RRRR0|wwww010001111110
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:divf.s R0004x2, R1115x2, R2731x2 is R0004x2 & op0510=0x3F & R1115x2; R2731x2 & op2126=0b100011 & op1620=0b11110
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{
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R2731x2 = R1115x2 f/ R0004x2;
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}
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# DIVF.S reg1, reg2, reg3 - rrrrr111111RRRRR|wwwww10001101110
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:divf.s R0004, R1115, R2731 is R0004 & op0510=0x3F & R1115; R2731 & op2126=0b100011 & op1620=0b01110
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{
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R2731 = R1115 f/ R0004;
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}
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# FLOORF.DL reg2, reg3 - rrrr011111100011|wwww010001010100
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:floorf.dl R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b00011; R2731x2 & op2126=0b100010 & op1620=0b10100
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{
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local var:8 = floor(float2float(R1115x2));
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R2731x2 = trunc(var);
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}
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# FLOORF.DUL reg2, reg3 - rrrr011111110011|wwww010001010100
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:floorf.dul R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b10011; R2731x2 & op2126=0b100010 & op1620=0b10100
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{
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local var:8 = floor(float2float(R1115x2));
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R2731x2 = trunc(var);
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}
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# FLOORF.DUW reg2, reg3 - rrrrr11111110011|wwwww10001010000
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:floorf.duw R1115x2, R2731 is R1115x2 & op0510=0x3F & op0004=0b10011; R2731 & op2126=0b100010 & op1620=0b10000
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{
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R2731 = trunc(floor(R1115x2));
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}
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# FLOORF.DW reg2, reg3 - rrrrr11111100011|wwwww10001010000
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:floorf.dw R1115x2, R2731 is R1115x2 & op0510=0x3F & op0004=0b00011; R2731 & op2126=0b100010 & op1620=0b10000
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{
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R2731 = trunc(floor(R1115x2));
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}
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# FLOORF.SL reg2, reg3 - rrrrr11111100011|wwww010001000100
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:floorf.sl R1115, R2731x2 is R1115 & op0510=0x3F & op0004=0b00011; R2731x2 & op2126=0b100010 & op1620=0b00100
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{
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local var:8 = floor(float2float(R1115));
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R2731x2 = trunc(var);
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}
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# FLOORF.SUL reg2, reg3 - rrrrr11111110011|wwwww10001000100
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:floorf.sul R1115, R2731x2 is R1115 & op0510=0x3F & op0004=0b10011; R2731x2 & op2126=0b100010 & op1620=0b00100
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{
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local var:8 = floor(float2float(R1115));
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R2731x2 = trunc(var);
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}
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# FLOORF.SUW reg2, reg3 - rrrrr11111110011|wwwww10001000000
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:floorf.suw R1115, R2731 is R1115 & op0510=0x3F & op0004=0b10011; R2731 & op2126=0b100010 & op1620=0b00000
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{
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R2731 = trunc(floor(R1115));
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}
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# FLOORF.SW reg2, reg3 - rrrrr11111100011|wwwww10001000000
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:floorf.suw R1115, R2731 is R1115 & op0510=0x3F & op0004=0b00011; R2731 & op2126=0b100010 & op1620=0b00000
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{
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R2731 = trunc(floor(R1115));
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}
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# MADDF.S reg1, reg2, reg3, reg4 - rrrrr111111RRRRR|wwwww101W00WWWW0
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:maddf.s R0004, R1115, R2731, reg4 is R0004 & op0510=0x3F & R1115; R2731 & op2426=0b101 & op2122=0b00 & op1616=0 & reg4
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{
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reg4 = (R1115 f* R0004) f+ R2731;
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}
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# MAXF.D reg1, reg2, reg3 - rrrr0111111RRRR0|wwww010001111000
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:maxf.d R0004x2, R1115x2, R2731x2 is R0004x2 & op0510=0x3F & R1115x2; R2731x2 & op2126=0b100011 & op1620=0b11000
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{
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local bigger:1 = R1115x2 f> R0004x2;
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either_or(R2731x2, bigger, R1115x2, R0004x2);
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}
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# MAXF.S reg1, reg2, reg3 - rrrrr111111RRRRR|wwwww10001101000
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:maxf.s R0004, R1115, R2731 is R0004 & op0510=0x3F & R1115; R2731 & op2126=0b100011 & op1620=0b01000
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{
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local bigger:1 = R1115 f> R0004;
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either_or(R2731, bigger, R1115, R0004);
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}
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# MINF.D reg1, reg2, reg3 - rrrr0111111RRRR0|wwww010001111010
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:minf.d R0004x2, R1115x2, R2731x2 is R0004x2 & op0510=0x3F & R1115x2; R2731x2 & op2126=0b100011 & op1620=0b11010
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{
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local bigger:1 = R1115x2 f< R0004x2;
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either_or(R2731x2, bigger, R1115x2, R0004x2);
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}
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# MINF.S reg1, reg2, reg3 - rrrr0111111RRRRR|wwwww10001101010
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:minf.s R0004, R1115, R2731 is R0004 & op0510=0x3F & R1115; R2731 & op2126=0b100011 & op1620=0b01010
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{
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local bigger:1 = R1115 f< R0004;
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either_or(R2731, bigger, R1115, R0004);
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}
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# MSUBF.S reg1, reg2, reg3, reg4 - rrrrr111111RRRRR|wwwww101W01WWWW0
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:msubf.s R0004, R1115, R2731, reg4 is R0004 & op0510=0x3F & R1115; R2731 & op2426=0b101 & op2122=0b01 & op1616=0 & reg4
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{
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reg4 = (R1115 f* R0004) f- R2731;
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}
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# MULF.D reg1, reg2, reg3 - rrrr0111111RRRR0|wwww010001110100
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:mulf.d R0004x2, R1115x2, R2731x2 is R0004x2 & op0510=0x3F & R1115x2; R2731x2 & op2126=0b100011 & op1620=0b10100
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{
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R2731x2 = R1115x2 f* R0004x2;
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}
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# MULF.S reg1, reg2, reg3 - rrrr0111111RRRRR|wwwww10001100100
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:mulf.s R0004, R1115, R2731 is R0004 & op0510=0x3F & R1115; R2731 & op2126=0b100011 & op1620=0b00100
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{
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R2731 = R1115 f* R0004;
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}
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# NEGF.D reg2, reg3 - rrrr011111100001|wwww010001011000
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:negf.d R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b00001; R2731x2 & op2126=0b100010 & op1620=0b11000
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{
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R2731x2 = f- R1115x2;
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}
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# NEGF.S reg2, reg3 - rrrrr11111100001|wwwww10001001000
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:negf.s R1115, R2731 is R1115 & op0510=0x3F & op0004=0b00001; R2731 & op2126=0b100010 & op1620=0b01000
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{
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R2731 = f- R1115;
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}
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# NMADDF.S reg1, reg2, reg3, reg4 - rrrrr111111RRRRR|wwwww101W10WWWW0
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:nmaddf.s R0004, R1115, R2731, reg4 is R0004 & op0510=0x3F & R1115; R2731 & op2426=0b101 & op2122=0b10 & op1616=0 & reg4
|
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{
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reg4 = f-((R1115 f* R0004) f+ R2731);
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}
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# NMSUBF.S reg1, reg2, reg3, reg4 - rrrrr111111RRRRR|wwwww101W11WWWW0
|
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:nmsubf.s R0004, R1115, R2731, reg4 is R0004 & op0510=0x3F & R1115; R2731 & op2426=0b101 & op2122=0b11 & op1616=0 & reg4
|
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{
|
|
reg4 = f-((R1115 f* R0004) f- R2731);
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}
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# RECIPF.D reg2, reg3 - rrrr011111100001|wwww010001011110
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:recipf.d R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b00001; R2731x2 & op2126=0b100010 & op1620=0b11110
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{
|
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R2731x2 = 1 f/ R1115x2;
|
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}
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# RECIPF.S reg2, reg3 - rrrrr11111100001|wwwww10001001110
|
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:recipf.s R1115, R2731 is R1115 & op0510=0x3F & op0004=0b00001; R2731 & op2126=0b100010 & op1620=0b01110
|
|
{
|
|
R2731 = 1 f/ R1115;
|
|
}
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# RSQRTF.D reg2, reg3 - rrrr011111100010|wwwww10001011110
|
|
:rsqrtf.d R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b00010; R2731x2 & op2126=0b100010 & op1620=0b11110
|
|
{
|
|
R2731x2 = 1 f/ sqrt(R1115x2);
|
|
}
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|
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# RSQRTF.S reg2, reg3 - rrrrr11111100010|wwwww10001001110
|
|
:rsqrtf.s R1115, R2731 is R1115 & op0510=0x3F & op0004=0b00010; R2731 & op2126=0b100010 & op1620=0b01110
|
|
{
|
|
R2731 = 1 f/ sqrt(R1115);
|
|
}
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|
|
|
# SQRTF.D reg2, reg3 - rrrr011111100000|wwww010001011110
|
|
:sqrtf.d R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b00000; R2731x2 & op2126=0b100010 & op1620=0b11110
|
|
{
|
|
R2731x2 = sqrt(R1115x2);
|
|
}
|
|
|
|
# SQRTF.S reg2, reg3 - rrrrr11111100000|wwwww10001001110
|
|
:sqrtf.s R1115, R2731 is R1115 & op0510=0x3F & op0004=0b00000; R2731 & op2126=0b100010 & op1620=0b01110
|
|
{
|
|
R2731 = sqrt(R1115);
|
|
}
|
|
|
|
# SUBF.D reg1, reg2, reg3 - rrrr0111111RRRR0|wwww010001110010
|
|
:subf.d R0004x2, R1115x2, R2731x2 is R0004x2 & op0510=0x3F & R1115x2; R2731x2 & op2126=0b100011 & op1620=0b10010
|
|
{
|
|
R2731x2 = R1115x2 f- R0004x2;
|
|
}
|
|
|
|
# SUBF.S reg1, reg2, reg3 - rrrrr111111RRRRR|wwwww10001100010
|
|
:subf.s R0004, R1115, R2731 is R0004 & op0510=0x3F & R1115; R2731 & op2126=0b100011 & op1620=0b00010
|
|
{
|
|
R2731 = R1115 f- R0004;
|
|
}
|
|
|
|
# TRFSR fcbit - 0000011111100000|000001000000fff0
|
|
:trfsr fcbit1719 is op1115=0 & op0510=0x3F & op0004=0; op2731=0 & op2126=0b100000 & op2020=0 & fcbit1719 & op1616=0
|
|
{
|
|
local var:4 = FPSR & (1 << (fcbit1719 + 24));
|
|
$(Z) = (var != 0);
|
|
}
|
|
|
|
# TRNCF.DL reg2, reg3 - rrrr011111100001|wwww010001010100
|
|
:trncf.dl R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b00001; R2731x2 & op2126=0b100010 & op1620=0b10100
|
|
{
|
|
R2731x2 = trunc(R1115x2);
|
|
}
|
|
|
|
# TRNCF.DUL reg2, reg3 - rrrr011111110001|wwww010001010100
|
|
:trncf.dul R1115x2, R2731x2 is R1115x2 & op0510=0x3F & op0004=0b10001; R2731x2 & op2126=0b100010 & op1620=0b10100
|
|
{
|
|
R2731x2 = trunc(R1115x2);
|
|
}
|
|
|
|
# TRNCF.DUW reg2, reg3 - rrrrr11111110001|wwwww10001010000
|
|
:trncf.duw R1115x2, R2731 is R1115x2 & op0510=0x3F & op0004=0b10001; R2731 & op2126=0b100010 & op1620=0b10000
|
|
{
|
|
R2731 = trunc(R1115x2);
|
|
}
|
|
|
|
# TRNCF.DW reg2, reg3 - rrrrr11111100001|wwwww10001010000
|
|
:trncf.dw R1115x2, R2731 is R1115x2 & op0510=0x3F & op0004=0b00001; R2731 & op2126=0b100010 & op1620=0b10000
|
|
{
|
|
R2731 = trunc(R1115x2);
|
|
}
|
|
|
|
# TRNCF.SL reg2, reg3 - rrrrr11111100001|wwww010001000100
|
|
:trncf.sl R1115, R2731x2 is R1115 & op0510=0x3F & op0004=0b00001; R2731x2 & op2126=0b100010 & op1620=0b00100
|
|
{
|
|
R2731x2 = trunc(R1115);
|
|
}
|
|
|
|
# TRNCF.SUL reg2, reg3 - rrrrr11111110001|wwww010001000100
|
|
:trncf.sul R1115, R2731x2 is R1115 & op0510=0x3F & op0004=0b10001; R2731x2 & op2126=0b100010 & op1620=0b00100
|
|
{
|
|
R2731x2 = trunc(R1115);
|
|
}
|
|
|
|
# TRNCF.SUW reg2, reg3 - rrrrr11111110001|wwwww10001000000
|
|
:trncf.suw R1115, R2731 is R1115 & op0510=0x3F & op0004=0b10001; R2731 & op2126=0b100010 & op1620=0b00000
|
|
{
|
|
R2731 = trunc(R1115);
|
|
}
|
|
|
|
# TRNCF.SW reg2, reg3 - rrrrr11111100001|wwwww10001000000
|
|
:trncf.sw R1115, R2731 is R1115 & op0510=0x3F & op0004=0b00001; R2731 & op2126=0b100010 & op1620=0b00000
|
|
{
|
|
R2731 = trunc(R1115);
|
|
}
|