ghidra/Ghidra/Processors/Z80/data/languages/z182.pspec

141 lines
6.5 KiB
XML

<?xml version="1.0" encoding="UTF-8"?>
<processor_spec>
<context_data>
<context_set space="ram">
<set name="assume8bitIOSpace" val="1"/>
</context_set>
<tracked_set space="ram">
<set name="DECOMPILE_MODE" val="1"/>
</tracked_set>
</context_data>
<programcounter register="PC"/>
<register_data>
<register name="AF_" group="Alt"/>
<register name="BC_" group="Alt"/>
<register name="DE_" group="Alt"/>
<register name="HL_" group="Alt"/>
</register_data>
<default_symbols>
<symbol name="RST0" address="ram:0000" entry="true"/>
<symbol name="RST1" address="ram:0008" entry="true"/>
<symbol name="RST2" address="ram:0010" entry="true"/>
<symbol name="RST3" address="ram:0018" entry="true"/>
<symbol name="RST4" address="ram:0020" entry="true"/>
<symbol name="RST5" address="ram:0028" entry="true"/>
<symbol name="RST6" address="ram:0030" entry="true"/>
<symbol name="RST7" address="ram:0038" entry="true"/>
<symbol name="NMI_ISR" address="ram:0066" entry="true"/>
<symbol name="CNTLA0" address="io:0000" entry="false"/>
<symbol name="CNTLA1" address="io:0001" entry="false"/>
<symbol name="CNTLB0" address="io:0002" entry="false"/>
<symbol name="CNTLB1" address="io:0003" entry="false"/>
<symbol name="STAT0" address="io:0004" entry="false"/>
<symbol name="STAT1" address="io:0005" entry="false"/>
<symbol name="TDR0" address="io:0006" entry="false"/>
<symbol name="TDR1" address="io:0007" entry="false"/>
<symbol name="RDR0" address="io:0008" entry="false"/>
<symbol name="RDR1" address="io:0009" entry="false"/>
<symbol name="CNTR" address="io:000a" entry="false"/>
<symbol name="TRD" address="io:000b" entry="false"/>
<symbol name="TMDR0L" address="io:000c" entry="false"/>
<symbol name="TMDR0H" address="io:000d" entry="false"/>
<symbol name="RLDR0L" address="io:000e" entry="false"/>
<symbol name="RLDR0H" address="io:000f" entry="false"/>
<symbol name="TCR" address="io:0010" entry="false"/>
<symbol name="ASEXT0" address="io:0012" entry="false"/>
<symbol name="ASEXT1" address="io:0013" entry="false"/>
<symbol name="TMDR1L" address="io:0014" entry="false"/>
<symbol name="TMDR1H" address="io:0015" entry="false"/>
<symbol name="RLDR1L" address="io:0016" entry="false"/>
<symbol name="RLDR1H" address="io:0017" entry="false"/>
<symbol name="FRC" address="io:0018" entry="false"/>
<symbol name="ASTC0L" address="io:001a" entry="false"/>
<symbol name="ASTC0H" address="io:001b" entry="false"/>
<symbol name="ASCT1L" address="io:001c" entry="false"/>
<symbol name="ASCT1H" address="io:001d" entry="false"/>
<symbol name="CMR" address="io:001e" entry="false"/>
<symbol name="CCR" address="io:001f" entry="false"/>
<symbol name="SAR0L" address="io:0020" entry="false"/>
<symbol name="SAR0H" address="io:0021" entry="false"/>
<symbol name="SAR0B" address="io:0022" entry="false"/>
<symbol name="DAR0L" address="io:0023" entry="false"/>
<symbol name="DAR0H" address="io:0024" entry="false"/>
<symbol name="DAR0B" address="io:0025" entry="false"/>
<symbol name="BCR0L" address="io:0026" entry="false"/>
<symbol name="BCR0H" address="io:0027" entry="false"/>
<symbol name="MAR1L" address="io:0028" entry="false"/>
<symbol name="MAR1H" address="io:0029" entry="false"/>
<symbol name="MAR1B" address="io:002a" entry="false"/>
<symbol name="IAR1L" address="io:002b" entry="false"/>
<symbol name="IAR1H" address="io:002c" entry="false"/>
<symbol name="IAR1B" address="io:002d" entry="false"/>
<symbol name="BCR1L" address="io:002e" entry="false"/>
<symbol name="BCR1H" address="io:002f" entry="false"/>
<symbol name="DSTAT" address="io:0030" entry="false"/>
<symbol name="DMODE" address="io:0031" entry="false"/>
<symbol name="DCNTL" address="io:0032" entry="false"/>
<symbol name="IL" address="io:0033" entry="false"/>
<symbol name="ITC" address="io:0034" entry="false"/>
<symbol name="RCR" address="io:0036" entry="false"/>
<symbol name="CBR" address="io:0038" entry="false"/>
<symbol name="BBR" address="io:0039" entry="false"/>
<symbol name="CBAR" address="io:003a" entry="false"/>
<symbol name="OMCR" address="io:003e" entry="false"/>
<symbol name="CR" address="io:003f" entry="false"/>
<symbol name="SCR" address="io:00EF" entry="false"/>
<symbol name="PADR" address="io:00EE" entry="false"/>
<symbol name="PADDR" address="io:00ED" entry="false"/>
<symbol name="RABR" address="io:00E8" entry="false"/>
<symbol name="RAMLBR" address="io:00E7" entry="false"/>
<symbol name="RAMUBR" address="io:00E6" entry="false"/>
<symbol name="PBDR" address="io:00E5" entry="false"/>
<symbol name="PBDDR" address="io:00E4" entry="false"/>
<symbol name="ECBDR" address="io:00E3" entry="false"/>
<symbol name="ECBCR" address="io:00E2" entry="false"/>
<symbol name="ECADR" address="io:00E1" entry="false"/>
<symbol name="ECACR" address="io:00E0" entry="false"/>
<symbol name="IEPMC" address="io:00DF" entry="false"/>
<symbol name="PDR" address="io:00DE" entry="false"/>
<symbol name="PDD" address="io:00DD" entry="false"/>
<symbol name="ZER" address="io:00D9" entry="false"/>
<symbol name="WSG" address="io:00D8" entry="false"/>
<symbol name="DLM" address="io:00F9" entry="false"/>
<symbol name="DDL" address="io:00F8" entry="false"/>
<symbol name="SCR" address="io:00F7" entry="false"/>
<symbol name="MSR" address="io:00F6" entry="false"/>
<symbol name="LSR" address="io:00F5" entry="false"/>
<symbol name="MCR" address="io:00F4" entry="false"/>
<symbol name="LCR" address="io:00F3" entry="false"/>
<symbol name="MM_FCR" address="io:00E9" entry="false"/>
<symbol name="IER" address="io:00F1" entry="false"/>
<symbol name="THR_RBR" address="io:00F0" entry="false"/>
<symbol name="TTTC" address="io:00EA" entry="false"/>
<symbol name="RTTC" address="io:00EB" entry="false"/>
<symbol name="FSCR" address="io:00EC" entry="false"/>
<symbol name="TTCR" address="io:00FA" entry="false"/>
<symbol name="RTCR" address="io:00FB" entry="false"/>
<symbol name="IVEC" address="io:00FC" entry="false"/>
<symbol name="IE" address="io:00FD" entry="false"/>
<symbol name="IUSIP" address="io:00FE" entry="false"/>
<symbol name="MMC" address="io:00FF" entry="false"/>
</default_symbols>
<default_memory_blocks>
<memory_block name="IO" start_address="io:0" length="0xFF" initialized="false"/>
</default_memory_blocks>
</processor_spec>