85 lines
2.7 KiB
Plaintext
85 lines
2.7 KiB
Plaintext
#
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# Instructions based on Intel Control-flow Enforcement Technology Preview
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#
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# Note: Shadow Stack semantics is not currently implemented correctly in these instructions
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# nor in the instructions affected by CET
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#
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define pcodeop ShadowStackPush8B;
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define pcodeop ShadowStackPush4B;
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define pcodeop ShadowStackLoad8B;
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define pcodeop ShadowStackLoad4B;
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:INCSSPD r32 is vexMode=0 & $(PRE_F3) & (opsize=0 | opsize=1 | opsize=2 | opsize=3) & byte=0x0f; byte=0xae; reg_opcode=5 & r32 {
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SSP = SSP + zext(4 * r32:1);
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}
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@ifdef IA64
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:INCSSPQ r64 is vexMode=0 & $(PRE_F3) & $(REX_W) & byte=0x0f; byte=0xae; reg_opcode=5 & r64 {
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SSP = SSP + zext(8 * r64:1);
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}
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@endif
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:RDSSPD r32 is vexMode=0 & $(PRE_F3) & (opsize=0 | opsize=1 | opsize=2 | opsize=3) & byte=0x0f; byte=0x1e; mod=3 & reg_opcode=1 & r32 {
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r32 = SSP:4;
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}
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@ifdef IA64
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:RDSSPQ r64 is vexMode=0 & $(PRE_F3) & $(REX_W) & byte=0x0f; byte=0x1e; mod=3 & reg_opcode=1 & r64 {
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r64 = SSP;
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}
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@endif
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:SAVEPREVSSP is vexMode=0 & $(PRE_F3) & (opsize=0 | opsize=1 | opsize=2 | opsize=3) & byte=0x0f; byte=0x01; byte=0xea {
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tmp:8 = SSP;
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SSP = SSP & ~0x7;
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ShadowStackPush8B(tmp);
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}
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:RSTORSSP m64 is vexMode=0 & $(PRE_F3) & (opsize=0 | opsize=1 | opsize=2 | opsize=3) & byte=0x0f; byte=0x01; ( mod != 0b11 & reg_opcode=5 ) ... & m64 {
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tmp_SSP:8 = m64;
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SSP = tmp_SSP & ~0x01;
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}
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define pcodeop writeToShadowStack;
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define pcodeop writeToUserShadowStack;
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:WRSSD rm32,Reg32 is vexMode=0 & byte=0x0f; byte=0x38; byte=0xf6; rm32 & Reg32 ... {
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writeToShadowStack(rm32, Reg32);
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}
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@ifdef IA64
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:WRSSQ rm64,Reg64 is vexMode=0 & $(REX_W) & byte=0x0f; byte=0x0f; byte=0x38; byte=0xf6; rm64 & Reg64 ... {
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writeToShadowStack(rm64, Reg64);
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}
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@endif
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:WRUSSD rm32,Reg32 is vexMode=0 & $(PRE_66) & byte=0x0f; byte=0x38; byte=0xf5; rm32 & Reg32 ... {
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writeToUserShadowStack(rm32, Reg32);
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}
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@ifdef IA64
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:WRUSSQ rm64,Reg64 is vexMode=0 & $(PRE_66) & $(REX_W) & byte=0x0f; byte=0x0f; byte=0x38; byte=0xf5; rm64 & Reg64 ... {
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writeToUserShadowStack(rm64, Reg64);
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}
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@endif
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define pcodeop markShadowStackBusy;
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define pcodeop clearShadowStackBusy;
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:SETSSBSY is vexMode=0 & $(PRE_F3) & (opsize=0 | opsize=1 | opsize=2 | opsize=3) & byte=0x0f; byte=0x01; byte=0xe8 {
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SSP = markShadowStackBusy(IA32_PL0_SSP);
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}
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:CLRSSBSY m64 is vexMode=0 & $(PRE_F3) & (opsize=0 | opsize=1 | opsize=2 | opsize=3) & byte=0x0f; byte=0xae; reg_opcode=6 ... & m64 {
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clearShadowStackBusy(m64);
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SSP=0;
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}
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:ENDBR32 is vexMode=0 & $(PRE_F3) & (opsize=0 | opsize=1 | opsize=2 | opsize=3) & byte=0x0f; byte=0x1e; byte=0xfb {}
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@ifdef IA64
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:ENDBR64 is vexMode=0 & $(PRE_F3) & (opsize=0 | opsize=1 | opsize=2 | opsize=3) & byte=0x0f; byte=0x1e; byte=0xfa {}
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@endif
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